Showing results for "SoC"
Design hardware security boundaries: secure/non-secure access, key storage assumptions, access control in CSR/DMA, and audit signals. Provide a threat model and verification plan for bypass attempts.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Design arbitration for shared resources: round-robin, fixed priority, aging, QoS-aware. Provide a method to evaluate fairness, tail latency, and starvation risk with traces.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Create a CSR spec template: address map, field semantics, reset values, side effects, atomicity, and reserved bits. Include guidelines for forward compatibility and software driver alignment.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Given workload and bandwidth, choose cache hierarchy vs scratchpad. Provide coherence implications, DMA model, and verification complexity tradeoffs. Include performance modeling approach.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Design an AXI4 subsystem plan: outstanding transactions, ID width, arbitration policy, QoS, burst alignment, and backpressure behavior. Provide a verification checklist for ordering, deadlock, and thr...
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Propose an interrupt strategy: aggregation, prioritization, masking, and latency optimization. Provide a register map approach and verification plan for storms and lost interrupts.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Design a preemptive cybersecurity approach: AI-driven exposure management, automated patch prioritization, agent-assisted triage, and ‘human-in-the-loop’ escalation. Include KPIs that reduce mean time...
Author: Assistant
Category: ai-strategy-2026 | Model: gpt-4o
Create a triage playbook: alert enrichment, false positive filters, incident severity, and closure checklist. Include a sample ticket flow.
Author: Assistant
Category: operations-runbook-cyber | Model: gpt-4o
Map roles (SOC, DFIR, GRC, AppSec, Red/Blue/Purple). Provide starter certs, portfolio tips, and interview question bank for HS→PhD.
Author: Assistant
Category: career-guide-students-cyber | Model: gpt-4o
Act as a PnR lead at 2nm. Propose a floorplan strategy for a large SoC with multiple GAA CPU/GPU clusters: die size estimate, aspect ratio, macro placement heuristics, channel widths, hierarchy partit...
Author: Assistant
Category: chip-design | Model: gpt-4
Act as a principal engineer. Define a CI/CD pipeline that satisfies SOC 2 and ISO 27001 concerns: branch policies, required reviews, SBOM generation, dependency scanning, SAST/DAST, signing and proven...
Author: tsubasa
Category: engineering | Model: gpt-4o
Propose a chiplet SoC using UCIe 1.1 over 2.5D interposer: partitioning rationale, die-to-die bandwidth/latency budget, PHY choices, protocol mapping, cache-coherency options, test strategy, and yield...
Author: Assistant
Category: chip-design | Model: gpt-4
You are a mechanical analysis lead. Outline a lightweight CFD/FEA plan for a heatsink on a 10 W SoC: boundary conditions, mesh strategy, material data, convergence criteria, validation with bench meas...
Author: tsubasa
Category: mechanical | Model: gpt-4o
Draft a safety and reliability plan: FIT targets, FMEDA, ASIL decomposition, safety mechanisms, aging stress, ESD/EMC design, and qualification flow (AEC-Q100). Provide safety case artifacts and test ...
Author: Assistant
Category: chip-design | Model: gpt-4
Threat-model feature <feature> using STRIDE. Identify assets, trust boundaries, attack paths, likelihood vs impact, and controls. Map mitigations to standards (ISO/IEC 27001, SOC 2). Output a table of...
Author: ChatGPT
Category: CTO | Model: GPT-5 Thinking
Build a predictable patch motion. Deliver: risk-based rings, pilot cohorts, maintenance windows per timezone, device health gates, rollback, and comms. KPIs: patch latency, failure %, vuln backlog. Ou...
Author: Tsubasa Kato
Category: Operations | Model: GPT-5 Thinking
Plan a simulation for battery SOC/SOH estimator (EKF/UKF). Deliver: cell model choice, drive cycles, noise models, KPIs (MAE, drift), fail-safes, logging. Output: algorithm pseudocode, dataset schema,...
Author: Tsubasa Kato
Category: Simulation | Model: GPT-5 Thinking