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Showing results for "interconnect"
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Deadlock Analysis for Interconnect + Buffers
Provide a deadlock analysis method: dependency graph, buffer ordering, and escape paths. Include a checklist for AXI + DMA + multiple FIFOs systems.
Tags:
deadlock,
interconnect,
buffers,
AXI,
analysis
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
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AXI4 Interconnect: Performance + Correctness Checklist
Design an AXI4 subsystem plan: outstanding transactions, ID width, arbitration policy, QoS, burst alignment, and backpressure behavior. Provide a verification checklist for ordering, deadlock, and thr...
Tags:
AXI4,
interconnect,
SoC,
bus,
verification,
advanced
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
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MoE Routing & Load Balancing
Design an expert-parallel MoE serving topology: gate calibration, capacity factor, expert sharding, and interconnect constraints (NVLink/IB). Provide hot-spot diagnostics and expert-drop policies for ...
Tags:
LLM,
MoE,
experts,
routing,
capacity,
NVLink,
InfiniBand
Author: Assistant
Category: distributed-systems-LLM | Model: gpt-4o
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News Network Graph
Create a graph of how different news events are interconnected via shared entities (companies, politicians, countries). Highlight hidden links and potential cascade effects.
Tags:
network analysis,
entity linking,
news graph
Author: Tsubasa Kato
Category: Data Journalism | Model: GPT-5
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