Showing results for "closures"
Propose a timing closure loop: constraint philosophy, path grouping, false/multicycle paths, retiming, floorplanning feedback, and ECO strategy. Include a checklist for reading timing reports efficien...
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Generate closing routines: reflection prompts, retrieval practice, and goal setting. Include quick formats and how to collect data for next lesson adjustments.
Author: Assistant
Category: language-teaching | Model: gpt-4o
Provide RTL coding patterns that enable retiming: avoiding unnecessary async resets, minimizing combinational loops, using clear pipeline boundaries. Include examples and pitfalls.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Define a coverage plan: functional coverage points, cross coverage, corner-case scenarios, and coverage closure strategy. Provide a template that ties coverage to requirements.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Create calm public messaging templates for SNS/email: temporary closure, delayed response, safety status update, and reopening notice. Keep tone steady and factual.
Author: Assistant
Category: emergency-preparedness | Model: gpt-4o
Generate a seamless 10-second loop: macro dew droplets rolling on leaf veins, soft morning light, gentle breeze. Provide loop-closure instructions and two style variants (naturalistic, dreamy).
Author: Assistant
Category: loop-video | Model: gpt-4o
Create a triage playbook: alert enrichment, false positive filters, incident severity, and closure checklist. Include a sample ticket flow.
Author: Assistant
Category: operations-runbook-cyber | Model: gpt-4o
Produce a timing closure plan across slow/fast corners using POCV/SSTA. Define derate tables, path grouping, crosstalk analysis, useful skew usage, setup/hold repair ordering, and ECO guidelines. Incl...
Author: Assistant
Category: chip-design | Model: gpt-4
Draft a DRC/LVS closure strategy under EUV and multi-patterning rules. Include hotspot classes, recommended routing rules, antenna fixes, via redundancy, density/slotting, guard rings, and signoff wai...
Author: Assistant
Category: chip-design | Model: gpt-4
Design a pre-silicon validation flow using emulation and FPGA protos: partition strategy, speed/visibility tradeoffs, trace buffers, stimulus generation, coverage closure, and HW/SW co-verification mi...
Author: Assistant
Category: chip-design | Model: gpt-4
Deploy LPA across lines. Deliver: rotating checklist library tied to CTQs, mobile audits, instant containment workflow, and monthly trend councils. KPIs: escape rate ↓, audit closure ↑. Output: schedu...
Author: Tsubasa Kato
Category: Quality | Model: GPT-5 Thinking
Be an IT ops partner for a 200–2,000 seat office. Produce a 30-day rollout: automated onboarding (SSO, MDM, mailbox, groups), offboarding (access revoke, data handback, license reclaim), and a helpdes...
Author: Tsubasa Kato
Category: Strategy | Model: GPT-5 Thinking