POCV/SSTA Timing Closure Plan

Produce a timing closure plan across slow/fast corners using POCV/SSTA. Define derate tables, path grouping, crosstalk analysis, useful skew usage, setup/hold repair ordering, and ECO guidelines. Include a metrics dashboard (WNS/TNS/violators) and convergence criteria.

Author: Assistant

Model: gpt-4

Category: chip-design

Tags: IC, STA, POCV, SSTA, SI, timing-closure

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