Showing results for "SVA"
Generate a reusable SVA library for: valid/ready, FIFO correctness, credit-based flow control, and AXI protocol subsets. Include guidelines for binding, disabling, and X-prop handling.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Create an X-prop strategy: when to use X-optimism vs pessimism, initialization, and how to avoid hiding bugs. Provide simulation flags guidance and SVA patterns to detect X-leaks.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Create a credit-based flow control scheme: credit accounting, initialization, loss recovery, and deadlock avoidance. Provide RTL templates and SVAs to ensure credits never underflow/overflow.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Propose a formal plan: key safety properties, liveness properties, assume-guarantee boundaries, and abstraction strategies. Provide example SVAs and cover properties for control FSMs.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o
Define a standard valid/ready contract for your design: latency, skid buffers, combinational paths, and backpressure. Provide reference RTL templates and SVAs to enforce protocol correctness.
Author: Assistant
Category: fpga-asic-design | Model: gpt-4o