Explore Prompts

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Edge AI on SBCs with ONNX Runtime

You are an edge-AI guide. Show how to deploy a small vision model on a Raspberry Pi-class SBC with ONNX Runtime. Include quantization steps, I/O pipeline, and FPS/power targets.
Tags: edge-AI, ONNX, quantization, SBC, vision
Author: Assistant
Created at: 2025-11-07 00:00:00
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WebGPU Compute for Browser ML

Act as a web-compute mentor. Outline a tutorial to run simple matrix ops and a tiny attention block in WebGPU. Include device feature checks, WGSL snippets, and performance measurement steps.
Tags: WebGPU, WGSL, browser, ML, compute
Author: Assistant
Created at: 2025-11-07 00:00:00
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CUDA Zero-to-Hero Mini-Curriculum

You are a GPU coach. Design a 4-week CUDA plan covering memory hierarchy, warps, occupancy, shared memory tiling, and profiling. Provide two kernels to optimize and a grading rubric for speedups.
Tags: CUDA, GPU, parallel, optimization, education
Author: Assistant
Created at: 2025-11-07 00:00:00
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Python Performance & Profiling Playbook

Act as a performance engineer. Provide a guide on profiling Python (cProfile, py-spy), vectorization, Numba, and Cython. Include memory tips, I/O batching, and a before/after benchmark template.
Tags: Python, performance, profiling, Numba, Cython
Author: Assistant
Created at: 2025-11-07 00:00:00
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Rust for Systems: Starter Roadmap

You are a systems tutor. Create a 6-week Rust roadmap for engineers moving from C/C++. Cover ownership/borrowing, traits, async, FFI, and building a CLI + service. Provide weekly labs, benchmarks vs C, and a template repo structure.
Tags: Rust, systems, performance, CLI, async
Author: Assistant
Created at: 2025-11-07 00:00:00
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90-Day AI Fundamentals Study Plan

Act as a mentor for students new to AI. Create a 90-day progression covering linear algebra refreshers, Python for ML, PyTorch basics, classic ML, and transformers. Include weekly goals, reading links (generic), coding exercises, and a pass/fail checklist for each week. End with a mini-capstone rubric.
Tags: AI, learning, students, PyTorch, transformers
Author: Assistant
Created at: 2025-11-07 00:00:00
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3D-IC/TSV Stress and Thermal Plan

Propose a 3D-IC plan with TSVs: mechanical stress modeling, keep-out zones, coupling mitigation, thermal stack design, test access, and yield strategy. Include co-simulation setup and acceptance thresholds.
Tags: IC, 3D-IC, TSV, thermal, mechanical-stress, yield
Author: Assistant
Created at: 2025-11-06 00:00:00
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Automotive-Grade SoC (AEC-Q100/ISO 26262)

Draft a safety and reliability plan: FIT targets, FMEDA, ASIL decomposition, safety mechanisms, aging stress, ESD/EMC design, and qualification flow (AEC-Q100). Provide safety case artifacts and test plan.
Tags: IC, automotive, ISO26262, AEC-Q100, safety, FMEDA
Author: Assistant
Created at: 2025-11-06 00:00:00
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Backside Power and Buried Rails Adoption

Create an adoption plan for backside power and buried rails on a next-gen CPU tile: design rule deltas, floorplan implications, timing/power impact, tool flow changes, risk mitigation, and fab engagement checklist.
Tags: IC, BSPDN, buried-rails, 2nm, CPU, enablement
Author: Assistant
Created at: 2025-11-06 00:00:00
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Standard Cell Library Characterization

Define a library characterization plan at low voltage (0.6 V): corners, CCS/ECSM models, NLDM fallback, slew/load grids, OCV views, and QA checks. Provide Liberty snippets and validation tests.
Tags: IC, standard-cells, Liberty, characterization, low-voltage, views
Author: Assistant
Created at: 2025-11-06 00:00:00
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Timing ECO Cookbook (Minimal PPA Hit)

Provide a timing ECO guide: buffer sizing rules, cell Vt swaps, re-route constraints, shielding for aggressors, hold-fix ordering, and checks to avoid IR/EM regression. Include a before/after metrics template.
Tags: IC, timing, ECO, SI, cell-sizing, Vt-swap
Author: Assistant
Created at: 2025-11-06 00:00:00
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ADC Architecture Trade Study

Compare SAR, pipeline, and sigma-delta ADCs for a sensor hub. Include FoM, resolution/SNR targets, sampling rate, power, area, calibration needs, and DFT hooks. Output a recommendation with risk log and bring-up plan.
Tags: IC, ADC, SAR, pipeline, sigma-delta, trade-study
Author: Assistant
Created at: 2025-11-06 00:00:00
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