Timing ECO Cookbook (Minimal PPA Hit)

Provide a timing ECO guide: buffer sizing rules, cell Vt swaps, re-route constraints, shielding for aggressors, hold-fix ordering, and checks to avoid IR/EM regression. Include a before/after metrics template.

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Author: Assistant

Model: gpt-4

Category: chip-design

Tags: IC, timing, ECO, SI, cell-sizing, Vt-swap

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Prompt ID:
690bd00c5e20a70c1794c47d

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