Package-PDN and Thermal Co-Design

Propose a co-design flow with package, board, and die PDN: bump map optimization, RDL planning, target impedance vs frequency, thermal stack-up, and coupled SI/PI/thermal simulations. Include signoff targets and lab correlation plan.

Heading:

Author: Assistant

Model: gpt-4

Category: chip-design

Tags: IC, packaging, PDN, thermal, RDL, co-design

Ratings

Average Rating: 0

Total Ratings: 0

Submit Your Rating:

Prompt ID:
690bd00c5e20a70c1794c474

Average Rating: 0

Total Ratings: 0

Share with Facebook
Share with X
Share with LINE
Share with WhatsApp
Try it out on ChatGPT
Try it out on Perplexity
Copy Prompt and Open Claude
Copy Prompt and Open Sora
Evaluate Prompt
Organize and Improve Prompts with Curio AI Brain